1. Field of the Invention
The present invention relates to a display apparatus and a drive control method therefore. Particularly, the invention relates to a display apparatus equipped with a display panel (display pixel array) having an array of a plurality of display pixels with a current-controlled (or current-driven) light emitting devices which emit lights of predetermined luminance gradations when supplied with a current according to display data, and a drive control method for the display apparatus.
2. Description of the Related Art
Recently, researches and developments for fully practical use and popularization of a light emission type display as the next generation display device to a liquid crystal display (LCD) which is widely used as a monitor or a display for a personal computer, a video device, portable information device and so forth have become active. The light emission type display has a display panel with a two-dimensional array of organic electroluminescence devices (organic EL devices), or self-emitting devices (self-emission type optical elements), such as light emitting diodes (LEDs).
Particularly, the light emission type display employing an active matrix drive system has a faster display response than an LCD. In addition, the light emission type display does not have a view angle dependency, and can achieve high luminescence, high contrast, high definition of display quality, etc. Further, the light emission type display has an excellent feature such that, unlike the LCD, it does not need a backlight, thus ensuring a flatter and lighter configuration.
Various drive control mechanisms and control methods for controlling the operation (emission state) of light emitting devices in such a light emission type display. For example, Unexamined Japanese Patent Application KOKAI Publication No. 2001-42822 describes the configuration having a drive circuit (pixel drive circuit) including a plurality of switching devices for emission drive control of a light emitting device for each of arrayed display cells of the display panel.
The display pixel having the conventional pixel drive circuit will be briefly described below.
FIG. 19 is a diagram showing the essential portion of the schematic configuration of a conventional active matrix type light emission display (organic EL display). FIG. 20 is a diagram showing the circuit configuration of a display cell to be used in the conventional active matrix type light emission display (organic EL display).
The light emission type display (organic EL display) described in the Unexamined Japanese Patent Application KOKAI Publication No. 2001-42822 has, as shown in FIG. 19, a display panel 110P, a scan-line drive circuit (scan driver) 120P, and a data-line drive circuit (data driver) 130P. The display panel 110P has a matrix of display cells (display pixels) EMp respectively provided at intersections of a plurality of scan lines Yp and a plurality of data lines Xp arrayed in rows and columns. The scan-line drive circuit 120P applies a scan-line select voltage to the individual scan lines Yp at a given timing. The data-line drive circuit 130P applies a data voltage to the individual data lines Xp at a given timing.
Each display cell EMp has a pixel drive circuit DCp having a select transistor (TFT) T1p, a drive transistor (TFT) T2p, and a capacitor Cp, as shown in FIG. 20, for example. The select transistor T1p has a gate terminal connected to the associated scan line Yp, a drain terminal connected to the associated data line Xp, and a source terminal connected to a node Np. The drive transistor T2p has a gate terminal connected to the node Np, and a source terminal connected to a common line Gp to which a ground potential GND is supplied. The capacitor Cp is connected between the node Np and the source terminal of the drive transistor T2p. An organic EL device OEL which is a current-controlled light emitting device has a cathode terminal connected to the drain terminal of the drive transistor T2p of the pixel drive circuit DCp, and an anode terminal connected to a supply voltage line Vp to which a supply voltage Vdd higher than the ground potential GND is supplied.
In the light emission type display with the display panel 110P having the display cells EMp, first, the scan-line drive circuit 120P sequentially applies the ON-level scan-line select voltage to the individual scan lines Yp to turn on the select transistors T1p of the display cells EMp (pixel drive circuits DCp) in a row, thereby setting the display cells EMp selected. In synchronism with the timing, the data-line drive circuit 130P applies the data voltage to the individual data lines Xp in columns so that a potential corresponding to the data voltage is applied to the node Np (i.e., the node between the gate terminal of the drive transistor T2p and one end of the capacitor Cp) via the select transistor T1p of each display cell EMp (pixel drive circuit DCp).
Accordingly, the drive transistor T2p is turned on in a conductive state corresponding to the potential of the node Np (strictly, the potential difference between the gate and source) (i.e., conductive state corresponding to the data voltage). A predetermined emission drive current flows to the common line Gp (ground potential GND) via the organic EL device OEL and the drive transistor T2p from the supply voltage line Vp (supply voltage Vdd), causing the organic EL device OEL to emit light with a luminance gradation corresponding to the data voltage (display data). At this time, the potential (data voltage) applied to the gate terminal (node Np) of the drive transistor T2p is held (stored) in the capacitor Cp.
Next, the scan-line drive circuit 120P applies the OFF-level scan-line select voltage to the scan lines Yp to turn off the select transistors T1p of the display cells EMp in a row. This sets the display cells EMp unselected, electrically disconnecting the data lines Xp from the pixel drive circuits DCp. At this time, the potential (data voltage) held in the capacitor Cp causes the potential of the gate terminal (node Np) of the drive transistor T2p to be held. As a result, a predetermined voltage is applied between the gate and source of the drive transistor T2p, so that the drive transistor T2p keeps the ON state. Accordingly, as in the light emission operation in the selected state, a predetermined emission drive current flows to the common line Gp (ground potential GND) via the organic EL device OEL and the drive transistor T2p from the supply voltage line Vp (supply voltage Vdd), so that light emission is maintained.
This drive control method controls the value of the emission drive current flowing to the organic EL device OEL to ensure light emission with a predetermined luminance gradation by regulating the value of the data voltage to be applied to each display cell EMp (specifically, the gate terminal of the drive transistor T2p of the pixel drive circuit DCp).
As the drive control method for an active matrix type light emission display, current-based gradation control is known in addition to the voltage-based gradation control described in the Unexamined Japanese Patent Application KOKAI Publication No. 2001-42822. The current-based gradation control supplies the data current having a value corresponding to display data to the display cells set in a selected state, thereby controlling the value of the emission drive current flowing to each organic EL device OEL according to the value of the data current.
In consideration of enlarging the display panel of the display apparatus, which has the aforementioned display cells (pixel drive circuits), however, the following problem arises in case of a display panel having a wide screen whose horizontal-vertical screen ratio (aspect ratio) is, for example, 16:9 and compatible with high vision video images of 1920 horizontal pixels×1080 vertical pixels.
In the display panel 110P shown in FIG. 19 and FIG. 20, the supply voltage Vdd to permit the emission drive current to flow to the of each organic EL device OEL of each display cell EMp is applied via the supply voltage line Vp commonly connected to the entire display cells. In consideration of the large aspect ratio (wide screen) or the high definition design of the display panel, the scan lines Yp laid out in rows and the supply voltage line Vp become considerably long in the widthwise direction of the display panel (the left and right direction in FIG. 19), and the number of display cells to be connected to the scan lines Yp and the supply voltage line Vp becomes considerably large. The longer the distance from the scan-line drive circuit 120P or the supply section (contact) for the supply voltage Vdd is (near the center area of the display panel 110P shown in FIG. 19), the greater the voltage drop originated by the wire resistance becomes, changing the values of the scan-line select voltage and the supply voltage Vdd to be applied to each display cell (voltage drops) and causing a signal delay.
With regard to the supply voltage line Vp to which the supply voltage Vdd is supplied, particularly, when the value of the supply voltage Vdd to be supplied to each display cell in the display panel changes, it does not become possible to permit flow of the emission drive current whose value corresponds to the display data (data voltage) to each display cell. This disables light emission with a desired luminance gradation, degrading the display quality. This problem also arises in a case of controlling the value of the emission drive current flowing to the organic EL device OEL using the value of the data current corresponding to display data.